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Global rank:
14,688 / 129,590
Skill pts: 5
Altium Designer Engineering Design FreeCAD 2D and 3D part Design High-Speed Signal Design Schematic Capture
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About

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Experience

  • Electrical Engineer Skyline Products · Full-time May 2025 – Jan 2026 8 mos Colorado Springs, CO, United States • Onboarded rapidly to Altium Designer for schematic capture and multilayer PCB layout, contributing to an estimated 50% productivity improvement
    • Performed functional testing and board-level validation of PCBs, including environmental stress testing
    • Authored procedural and test documentation, consolidating process instructions and yielding an estimated 10% reduction in cycle time
    • Developed Python test automation scripts using AI-assisted programming, improving test repeatability and reliability for Sense.io boards by an estimated 100%
    • Participated in design reviews with inputs on DFM, component selection, and design for test (DFT)
    • Maintained version-controlled schematic and layout archives; managed issue tracking via GitLab
    • Researched component and BOM data using Made2Manage ERP system
    • Designed and executed conformal coating selection experiments for PCB protection; logged results in GitHub
  • Sr. System Test Engineer Viking Enterprise Solutions (Div. of Sanmina) · Full-time Jan 2024 – May 2025 1 yrs 4 mos Colorado Springs, CO, United States • Defined and designed multilayer test PCBs to support factory manufacturing test coverage and DFT requirements
    • Identified, scoped, and documented test plans to prove design durability, functionality, and reliability
    • Authored automated test scripts for highly repeatable system validation across Sanmina international manufacturing sites
    • Troubleshot failing systems at board level to identify test coverage gaps and root causes; documented resolutions in Jira
    • Served as assistant ECAD administrator for the Cadence OrCAD schematic capture tool, including library management and design rule upkeep
    • Managed FPGA firmware revision control using SourceTree with BitBucket; coordinated on HDL-based design changes
    • Collaborated with Sanmina international manufacturing sites on DFM challenges, production test requirements, and manufacturing yield improvement
    • Participated in product cost reduction team, evaluating BOM and component alternatives
  • Electrical Hardware Engineer Viking Enterprise Solutions (Div. of Sanmina) · Full-time Dec 2016 – Jan 2024 7 yrs 1 mos Colorado Springs, CO, United States • Designed high-reliability, high-current switching buck power supply PCBs; performed PI simulations using Cadence Sigrity to validate PDN integrity and power structure, with attention to EMI/EMC layout best practices
    • Performed extensive board-level testing, troubleshooting, and root cause analysis for new system designs
    • Saved company $30K+ by identifying off-the-shelf adapter solutions, eliminating the need for custom board design
    • Developed Bash system configuration script that reduced setup time by 50%
    • Modified FPGA HDL code to eliminate a damaging system code state, improving overall design reliability
    • Executed power structure analysis for high-current designs; verified compliance with documented design parameters
    • Designed, tested, and troubleshot I2C and SPI communication structures at the board level
    • Proficient in Cadence OrCAD schematic capture; experienced with Cadence Sigrity for PI simulation and PDN analysis
    • Designed and coded Python scripts for automated, repeatable system-level testing
    • Collaborated with international layout teams to meet DFM, DFT, and IPC design standards; reviewed designs for impedance control and stackup compliance
    • Prepared and submitted design packages (schematics, BOM, fabrication notes, Gerber files) into Agile PLM tracking system
    • Used ChipLink and Scrutiny SI on-chip SerDes diagnostic tools for signal integrity analysis and troubleshooting
  • Electrical Hardware Engineer Hewlett-Packard Enterprise · Full-time Sep 2012 – Sep 2015 3 yrs Colorado Springs, CO, United States • Led cross-site Cadence ECAD design standardization initiative, establishing schematic symbol library conventions and design rule standards
    • Owned schematic capture and multilayer PCB layout for Fibre Channel SerDes high-speed interfaces on storage server platforms, including impedance-controlled stackup coordination
    • Owned schematic capture and PCB layout for JTAG boundary scan structures on storage server platforms
    • Performed power analysis for low-voltage, medium-current power structures; verified PDN integrity against design specifications
    • Identified, troubleshot, and resolved first-article issues at the board and system level
    • Packaged Cadence hierarchical design for fabrication release, including Gerber/ODB++ output and BOM generation
    • Executed validation testing for assigned design sections; documented results against test plans
    • Designed, tested, and troubleshot I2C and SPI communication structures at the board level

Education

  • University of Colorado Colorado Springs Bachelor's of Science, Electrical Engineering, 3.15 2002 – 2011 Activities and Societies: * On the Dean's list a few times. Was a stay-at-home father while also completing home renovation projects and operating a small home improvement business while attending classes at UCCS.

Other experience

  • FreeCAD 2D & 3D Have created some 2D and 3D drawings in FreeCAD.

Licenses & Certifications

Stats

Joined: April 16, 2026

Last seen: April 17, 2026

Area of Expertise
Electrical Engineering General Design Gadgets Design DIY Design PCB Design Services Design Engineering Services Prototype Design Engineering Electronic Prototyping and Design Services Design for Manufacturing and Assembly DFM Services Electronic Enclosures Design Electronics Design Service Electrical Schematic Drawing Services Electrical Circuit Design Services

Languages

English Native or bilingual proficiency

Location

Colorado Springs, CO, United States