Designer
Ellie_
PCB Design Engineer | PCB Layout | KiCad
• 2-layer and 4-layer PCB layout • USB and differential pair routing • Controlled impedance routing • DDR4 length matching • Component placement and routing • Design Rule Check (DRC) • Gerber and manufacturing
Designer
sreek3
PCB Layout Design Engineer with 20+ Years Exp in Cadence Allegro
View Mate , Power DC. Signal Integrity (SI) , EMI/EMC , Differential Pair Routing , Length Matching , Delay Matching , Tight-Tolerance Routing Complex multi-layer boards up to 46 layers; probe cards
3D Model
Smart Vehicle Interface PCB – CAN, LIN,K-Line &BLE
BLE module. Special attention was given to automotive constraints such as EMI reduction, differential pair routing for CAN, proper grounding strategy, and robust input protection (TVS, fuse, reverse polarity)
Designer
kiruthikas
IC SUBSTRATE DESIGNER
pitch, higher die pin count, and multi-layer routing. Created complex multilayer organic substrates (MLO/MLC, coreless substrate) for high- density routing applications Signal Integrity and Power Integrity:
Designer
saraa9
Pcb layout designer
rigid-flex, and high-density interconnects. Signal & Power Integrity: Impedance control, differential pair routing, noise reduction, and decoupling optimization. Hardware Engineering: Component selection
Designer
shahidanis
Senior PCB & Hardware Design Engineer | RF & High-Speed Digital | FPGA | Altium & Cadence Allegro
hardware DDR4, ADC and DAC Differential pair routing Controlled impedance design PCB stack-up and layer planning Blind vias and back-drilling Component placement and routing optimization DFM and manufacturing
Service
PCB Design Services
micro-vias PCB design for commercial, medical, and military applications DDR2, DDR3, and DDR4 Differential pair routing Cad Crowd takes the guesswork out of hiring online. We connect you with a qualified pre-vetted
Designer
Suneela
PCB Design Engineer | High-Speed & Multilayer PCB Design | Cadence Allegro | OrCAD Capture
Experienced PCB Design Engineer specializing in multilayer, high-speed, and mixed-signal PCB layout design for industrial, power electronics, aerospace, and defense applications.
Job
Independent Engineering Review of Completed 4-Layer KiCad PCB — ESP32 / LiPo / Haptic Device
implementation and layout
- BQ25100 charger implementation
- fine-pitch 0.4 mm DSBGA footprint and routing
- ESP32-C3 power, grounding, and RF/antenna implementation
- DRV2605L / LRA implementation
- decoupling
3D Model
5G RF Front-End 6-Layer Multilayer PCB Design
implementation. My work included schematic-to-layout development, controlled-impedance routing, differential pair handling, RF component placement, transmission-line design, impedance matching, via stitching