About
Flip-chip and BGA Design: Lead the design and optimization of flip-chip BGA packages
•
with Lower pitch, higher die pin count, and multi-layer routing. Created complex
multilayer organic substrates (MLO/MLC, coreless substrate) for high- density routing
applications
Signal Integrity and Power Integrity: Implemented advanced techniques for optimizing
•
signal integrity (SI) and power integrity (PI) in high-speed designs, including impedance
matching, differential pair routing, and managing decoupling capacitors to minimize IR
drop.
High-Speed Interface Design: Worked extensively on high-speed interfaces such as PCIe,
•
DDR, USB, WLAN, LPDDR, MIPI, and RF. Optimized signal routing to meet stringent
performance requirements and achieve reliable high-speed communication
Collaborative Design: Coordinated with a cross-functional team of engineers to ensure
•
the seamless execution of design projects. Provided guidance and mentorship on best
practices for substrate design, including layout recommendations for optimizing PDN
and SI.
Project Ownership: Took full ownership of design projects, managing all aspects of the
•
design process, including layout creation, constraints setup, and ensuring the design
adhered to customer requirements and quality standards
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Experience
-
IC substrate designer
Caliber Interconnect solution · Full-time
Sep 2021 –
May 2025
3 yrs 8 mos
Tirunelveli, TN, India
Flip-chip and BGA Design: Lead the design and optimization of flip-chip BGA packages
•
with Lower pitch, higher die pin count, and multi-layer routing. Created complex
multilayer organic substrates (MLO/MLC, coreless substrate) for high- density routing
applications
Signal Integrity and Power Integrity: Implemented advanced techniques for optimizing
•
signal integrity (SI) and power integrity (PI) in high-speed designs, including impedance
matching, differential pair routing, and managing decoupling capacitors to minimize IR
drop.
High-Speed Interface Design: Worked extensively on high-speed interfaces such as PCIe,
•
DDR, USB, WLAN, LPDDR, MIPI, and RF. Optimized signal routing to meet stringent
performance requirements and achieve reliable high-speed communication
Collaborative Design: Coordinated with a cross-functional team of engineers to ensure
•
the seamless execution of design projects. Provided guidance and mentorship on best
practices for substrate design, including layout recommendations for optimizing PDN
and SI.
Project Ownership: Took full ownership of design projects, managing all aspects of the
•
design process, including layout creation, constraints setup, and ensuring the design
adhered to customer requirements and quality standards
Education
-
kendriya Vidyalaya
B . E, Electronic and communication engineering, 8.678
2017 – 2021