Ranjith V.
PCB Design Engineer | Cadence Allegro |Altium | High-Speed PCB Layout, DDR/PCIe, HDI & Multilayer De
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About
I am a PCB Design Engineer with 5.2 years of experience in Cadence Allegro, specializing in high-speed routing, multilayer and HDI PCB design, and server and power boards.
My expertise includes DDR4/DDR5, PCIe, SATA, USB, Ethernet, blind and buried vias, SI/PI considerations, DRC, DFM, and Gerber generation. I have worked on complex PCB designs of up to 16 layers, focusing on routing quality, design constraints, and manufacturability.
I provide reliable remote PCB layout, routing, design review, and optimization services to help clients bring their hardware projects from schematic to fabrication-ready design.
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My expertise includes DDR4/DDR5, PCIe, SATA, USB, Ethernet, blind and buried vias, SI/PI considerations, DRC, DFM, and Gerber generation. I have worked on complex PCB designs of up to 16 layers, focusing on routing quality, design constraints, and manufacturability.
I provide reliable remote PCB layout, routing, design review, and optimization services to help clients bring their hardware projects from schematic to fabrication-ready design.
Experience
- PCB Deisgner HCL Technologies · Full-time Sep 2026 – Present 1 mos Chennai, Tamil Nadu, India Working as a PCB Design Engineer, specializing in Cadence Allegro PCB layout, high-speed routing, and multilayer board design. Experienced in DDR4/DDR5, PCIe, SATA, USB, Ethernet, HDI, and server and power boards. Responsible for component placement, constraint-driven routing, design rule verification, SI/PI considerations, DFM, and Gerber generation. Focused on delivering high-quality, manufacturable PCB layouts that meet project specifications.
- Senior Executive Design Solar Defence and Aerospace Ltd · Full-time Mar 2026 – Sep 2026 6 mos Hyderabad, Telangana, India Worked as a PCB Design Engineer at Solar Defence & Aerospace, specializing in multilayer and HDI PCB layout using Cadence Allegro. Experienced in component placement, high-speed routing, DDR, USB, Ethernet, RS422/RS485, and CAN interfaces. Responsible for constraint-driven routing, design rule checks, SI/PI considerations, design verification, and Gerber generation, ensuring compliance with electrical, mechanical, and manufacturing requirements.
- Senior Engineer VVDN Technologies · Full-time Jul 2024 – Mar 2026 1 yrs 8 mos Chennai, Tamil Nadu, India Worked as a PCB Design Engineer at VVDN Technologies, specializing in server and power distribution board design using Cadence Allegro. Experienced in multilayer PCB design up to 16 layers, high-speed routing for DDR4/DDR5, PCIe, and SATA interfaces, and high-current power boards up to 400A. Responsibilities included component placement, constraint-driven routing, SI/PI considerations, design rule verification, DFM checks, and Gerber generation, ensuring high-quality and manufacturable PCB designs.
- Associate Engineer L&T Technologies and Services · Full-time Jun 2021 – Jun 2024 3 yrs Chennai, Tamil Nadu, India Worked as a PCB Design Engineer at L&T Technology Services, specializing in PCB layout and routing for automotive BMS, LED lighting, and electronic test systems. Experienced in multilayer PCB design up to 12 layers, high-speed interface routing, and designs using blind and buried vias. Responsibilities included component placement, routing optimization, design rule checks, SI/PI considerations, EMI/EMC support, DFM, and Gerber generation, ensuring reliable and manufacturable PCB designs.
Education
- SRMIST Btech, Electronics and Communication, 8.2 2022 – 2025
- Murugappa Polytechnic College Diploma, Electronics and Communication, 9.2 2017 – 2020
Verified info
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Joined: October 9, 2026
Last seen: October 9, 2026
Area of Expertise
Languages
English Full professional proficiency
Tamil Native or bilingual proficiency
Telugu Limited working proficiency
Location
Chennai, India