About
I am a Senior FPGA and Embedded Systems Engineer with extensive experience designing and implementing high-performance digital systems using Verilog, VHDL, and SystemVerilog. My background includes RTL architecture design, IP core development, timing closure optimization, and full FPGA implementation flow using Xilinx Vivado and Intel Quartus toolchains.
I have delivered FPGA-based solutions for signal processing, sensor integration, high-speed communication interfaces (I2C, SPI, UART, AXI), and SoC-based systems including Zynq platforms. My expertise covers simulation and verification (ModelSim/Questa), hardware debugging, embedded Linux integration, and system-level hardware/software co-design.
I specialize in translating complex system requirements into efficient, resource-optimized FPGA architectures while ensuring clean timing, scalability, and long-term maintainability. I am experienced in working with cross-functional teams and delivering production-ready designs with clear documentation and validation reports.
My strengths include problem-solving under constraints, structured design methodology, and delivering reliable hardware solutions on schedule
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Experience
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Senior FPGA & Embedded Systems Engineer
Freelance Engineer · Freelance
Feb 2017 –
Present
9 yrs
London, England, United Kingdom
I lead the design and implementation of FPGA-based digital systems for embedded and high-performance applications. My responsibilities include RTL architecture design using Verilog/VHDL, IP core development, timing optimization, simulation and verification, and full FPGA implementation using Xilinx Vivado and Intel Quartus toolchains.
I have delivered solutions involving Zynq SoC platforms, high-speed interfaces (I2C, SPI, UART, AXI), sensor integration, and hardware/software co-design. My work includes system debugging, performance optimization, embedded Linux integration, and production-level validation.
I collaborate with cross-functional teams to translate system requirements into scalable, resource-efficient FPGA architectures, ensuring timing closure, reliability, and maintainability. I maintain structured documentation and follow industry best practices for design verification and testing.
Education
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University of Abdelhamid Ibn Badis Mostaganem
Bachelor of Engineering (BEng), Electrical and Electronic Engineering, First Class Honours
2010 – 2014
Activities and Societies:
IEEE Student Member, Robotics Club, Embedded Systems Research Group, FPGA Development Team
Focused on digital system design, FPGA architecture, embedded systems, and signal processing. Completed advanced coursework in digital logic design, microprocessors, hardware description languages (Verilog/VHDL), communication systems, and real-time embedded systems.
Final-year project involved designing and implementing an FPGA-based embedded system integrating sensor interfaces and hardware acceleration techniques. Gained practical experience with Xilinx toolchains, RTL simulation, hardware debugging, and system-level integration.
Developed strong analytical, problem-solving, and hardware/software co-design skills applicable to real-world engineering applications.