About the job
Schematic capture and PCB layout for a small carrier board. It hosts an off-the-shelf Pico-form-factor Ethernet module and adds a 3.3 V RS-485 interface and a 12 V power input.
Roughly 25 components, 2 layers, no controlled impedance, no high-speed routing. The MCU, flash, crystals, Ethernet PHY, RJ45 and USB are all on the plug-in module.
Module
WIZnet W6100-EVB-Pico2 — Raspberry Pi Pico form factor, 2×20 pins, publicly documented pinout and mechanical drawing. Mounts to the carrier via two 1×20 female headers, 2.54 mm.
Module pins used
Pin Signal Connects to
1 GP0 U1 pin 4 (DI)
2 GP1 U1 pin 1 (RO)
4 GP2 U1 pin 3 (DE), and R5
5 GP3 U1 pin 2 (RE), and R6
36 3V3 out U1 pin 8 (VCC), C4, R7
39 VSYS D2 cathode
3, 8, 38 GND GND
Bring all other module pins out to the headers, unconnected. Do not connect pin 40 (VBUS).
RS-485 interface
U1: 3.3 V half-duplex RS-485 transceiver, fault-protected, high IEC ESD rating (THVD1450, SN65HVD72, MAX3485E or similar). Powered from module pin 36. Must be a 3.3 V part
R5, R6: 10 kΩ pull-downs from DE and RE to GND. Required, do not omit — these keep the transceiver in receive-only whenever the module is not driving those pins
TVS2: SM712 at the connector; R1, R2: 10 Ω in series between TVS and transceiver
R3: 120 Ω termination across A/B via jumper JP1, unfitted by default
R7, R8: 560 Ω failsafe bias (A to 3V3, B to GND) via JP2/JP3, unfitted by default
J2: 3-position pluggable screw terminal, 3.5 mm — A / B / 0V....
read more
Schematic capture and PCB layout for a small carrier board. It hosts an off-the-shelf Pico-form-factor Ethernet module and adds a 3.3 V RS-485 interface and a 12 V power input.
Roughly 25 components, 2 layers, no controlled impedance, no high-speed routing. The MCU, flash, crystals, Ethernet PHY, RJ45 and USB are all on the plug-in module.
Module
WIZnet W6100-EVB-Pico2 — Raspberry Pi Pico form factor, 2×20 pins, publicly documented pinout and mechanical drawing. Mounts to the carrier via two 1×20 female headers, 2.54 mm.
Module pins used
Pin Signal Connects to
1 GP0 U1 pin 4 (DI)
2 GP1 U1 pin 1 (RO)
4 GP2 U1 pin 3 (DE), and R5
5 GP3 U1 pin 2 (RE), and R6
36 3V3 out U1 pin 8 (VCC), C4, R7
39 VSYS D2 cathode
3, 8, 38 GND GND
Bring all other module pins out to the headers, unconnected. Do not connect pin 40 (VBUS).
RS-485 interface
U1: 3.3 V half-duplex RS-485 transceiver, fault-protected, high IEC ESD rating (THVD1450, SN65HVD72, MAX3485E or similar). Powered from module pin 36. Must be a 3.3 V part
R5, R6: 10 kΩ pull-downs from DE and RE to GND. Required, do not omit — these keep the transceiver in receive-only whenever the module is not driving those pins
TVS2: SM712 at the connector; R1, R2: 10 Ω in series between TVS and transceiver
R3: 120 Ω termination across A/B via jumper JP1, unfitted by default
R7, R8: 560 Ω failsafe bias (A to 3V3, B to GND) via JP2/JP3, unfitted by default
J2: 3-position pluggable screw terminal, 3.5 mm — A / B / 0V. 0V ties to board ground. Place at board edge
Power
J1: 2-position pluggable screw terminal, 3.5 mm — 12 V DC in, 11–14 V range
F1 polyfuse 500 mA, D1 SS34 series Schottky for reverse polarity, TVS1 SMBJ26A clamp
U2: AP63205WU-7 buck (or equivalent, 5 V fixed out, wide input). Follow the datasheet application circuit
D2: SS34 Schottky from the 5 V output to module pin 39 (VSYS). Required — prevents back-feed when the module is powered from its own USB
The board must work on 12 V alone, on module USB alone, and with both connected
Other
Power LED on 5 V; one status LED on a module GPIO (I will nominate the pin)
Test points: 5 V, 3V3, A, B, 0V, UART TX, UART RX, DE
Mechanical
Board size approximately 50 × 80 mm. Larger is acceptable if the layout needs it — get as close to this as is comfortable, don't cramp the board to hit it exactly
4× mounting holes, 3.5 mm diameter, spaced 40 mm × 70 mm CENTRE-TO-CENTRE, i.e. hole centres at (±20, ±35) mm from the board centre. These positions are fixed — please treat them as a hard constraint and lay out around them
Keep the mounting holes clear of copper on both layers, with a keepout for the screw head
Layout notes
J2 → TVS2 → R1/R2 → U1 in a straight line at the board edge
R5, R6 physically adjacent to U1 pins 2 and 3
Buck input cap, IC, inductor and output cap kept tight together
C4 at U1 pin 8
Ground pour on the bottom layer
Nothing else is critical
Deliverables
Schematic (source + PDF), PCB layout (source), Gerbers RS-274X, NC drill, BOM with manufacturer and LCSC part numbers, pick-and-place file.
Tools: KiCad or EasyEDA. Native source files required, not just fabrication outputs.
Manufacturing target: JLCPCB, 2-layer, standard process. Prefer JLCPCB Basic parts where the choice is free.
Please quote a fixed price and a timeline.
read less
Schematic capture and PCB layout for a small carrier board. It hosts an off-the-shelf Pico-form-factor Ethernet module and adds a 3.3 V RS-485 interface and a 12 V power input.
Roughly 25 components, 2 layers, no controlled impedance, no high-speed routing. The MCU, flash, crystals, Ethernet PHY, RJ45 and USB are all on the plug-in module.
Module
WIZnet W6100-EVB-Pico2 — Raspberry Pi Pico...
read more
Schematic capture and PCB layout for a small carrier board. It hosts an off-the-shelf Pico-form-factor Ethernet module and adds a 3.3 V RS-485 interface and a 12 V power input.
Roughly 25 components, 2 layers, no controlled impedance, no high-speed routing. The MCU, flash, crystals, Ethernet PHY, RJ45 and USB are all on the plug-in module.
Module
WIZnet W6100-EVB-Pico2 — Raspberry Pi Pico form factor, 2×20 pins, publicly documented pinout and mechanical drawing. Mounts to the carrier via two 1×20 female headers, 2.54 mm.
Module pins used
Pin Signal Connects to
1 GP0 U1 pin 4 (DI)
2 GP1 U1 pin 1 (RO)
4 GP2 U1 pin 3 (DE), and R5
5 GP3 U1 pin 2 (RE), and R6
36 3V3 out U1 pin 8 (VCC), C4, R7
39 VSYS D2 cathode
3, 8, 38 GND GND
Bring all other module pins out to the headers, unconnected. Do not connect pin 40 (VBUS).
RS-485 interface
U1: 3.3 V half-duplex RS-485 transceiver, fault-protected, high IEC ESD rating (THVD1450, SN65HVD72, MAX3485E or similar). Powered from module pin 36. Must be a 3.3 V part
R5, R6: 10 kΩ pull-downs from DE and RE to GND. Required, do not omit — these keep the transceiver in receive-only whenever the module is not driving those pins
TVS2: SM712 at the connector; R1, R2: 10 Ω in series between TVS and transceiver
R3: 120 Ω termination across A/B via jumper JP1, unfitted by default
R7, R8: 560 Ω failsafe bias (A to 3V3, B to GND) via JP2/JP3, unfitted by default
J2: 3-position pluggable screw terminal, 3.5 mm — A / B / 0V. 0V ties to board ground. Place at board edge
Power
J1: 2-position pluggable screw terminal, 3.5 mm — 12 V DC in, 11–14 V range
F1 polyfuse 500 mA, D1 SS34 series Schottky for reverse polarity, TVS1 SMBJ26A clamp
U2: AP63205WU-7 buck (or equivalent, 5 V fixed out, wide input). Follow the datasheet application circuit
D2: SS34 Schottky from the 5 V output to module pin 39 (VSYS). Required — prevents back-feed when the module is powered from its own USB
The board must work on 12 V alone, on module USB alone, and with both connected
Other
Power LED on 5 V; one status LED on a module GPIO (I will nominate the pin)
Test points: 5 V, 3V3, A, B, 0V, UART TX, UART RX, DE
Mechanical
Board size approximately 50 × 80 mm. Larger is acceptable if the layout needs it — get as close to this as is comfortable, don't cramp the board to hit it exactly
4× mounting holes, 3.5 mm diameter, spaced 40 mm × 70 mm CENTRE-TO-CENTRE, i.e. hole centres at (±20, ±35) mm from the board centre. These positions are fixed — please treat them as a hard constraint and lay out around them
Keep the mounting holes clear of copper on both layers, with a keepout for the screw head
Layout notes
J2 → TVS2 → R1/R2 → U1 in a straight line at the board edge
R5, R6 physically adjacent to U1 pins 2 and 3
Buck input cap, IC, inductor and output cap kept tight together
C4 at U1 pin 8
Ground pour on the bottom layer
Nothing else is critical
Deliverables
Schematic (source + PDF), PCB layout (source), Gerbers RS-274X, NC drill, BOM with manufacturer and LCSC part numbers, pick-and-place file.
Tools: KiCad or EasyEDA. Native source files required, not just fabrication outputs.
Manufacturing target: JLCPCB, 2-layer, standard process. Prefer JLCPCB Basic parts where the choice is free.
Please quote a fixed price and a timeline.
read less